SSD NAND Flash Memory Layout

Source: anandtech.com

1.       Pages:  multiple memory cells

1.       one page is the smallest structure which can be read or written

2.       Blocks: multiple pages

1.       one block is the smallest structure which can be erased

2.       e.g.

one block = 128 pages á 4 KiB

(with MLC 16.384 memory cells per page)

→ 512 KiB Block

3.       newer SSDs (25nm/20nm Intel/Micron

                       or 24nm/19nm Sandisk/Toshiba)

one block = 256 pages á 8 KiB

→ 2 MiB Block

3.       Planes :

Multiple blocks make up a plane

e.g  1024 Blocks  =  1 Plane

25nm Intel/Micron :-  1Plane = 2GiByte

Intel/Micron: dies with 64 GiBit (8 GiByte)

4.       Dies:

       Multiple planes make up a die

          e.g   4 Planes = 1 Die

Complete Layout of SSD:

A typical 2Gb Single Level Cell (SLC) NAND Flash device is organized as 2,048 blocks, with 64 pages per block.
Each page is 2,112 bytes, consisting of a 2,048-byte data area and a 64-byte spare area.
The spare area is typically used for Error Control and Coding (ECC), wear-leveling, and other software overhead functions, although it is physically the same as the rest of the page.

Inside a standard SDD